This invention relates to semiconductor memory arrays, and in particular to charge pumps for providing prograrnming voltages to conductive lines such as word lines and bit lines in programmable semiconductor memory arrays such as electrically erasable read-only memories (EEPROM).
Programming floating-gate non-volatile semiconductor memories such as EEPROMs typically involves charging up memory word lines (x-lines) and bit lines selected for programming. Specialized on-chip charge pumps can be used for selectively charging selected word lines and bit lines. As the space between the high-voltage nodes and the carrier injection points of the charge pump circuit decreases, the problem of carrier injection into the circuit substrate increases in importance. Carrier injection or escape occurs when conductive channels in active devices are driven to switch potential from high to low or low to high. Carrier injection into the circuit substrate and subsequent migration of electrons to the high-voltage nodes of the circuit can significantly degrade the pumping efficiency of the charge pumps.
In U.S. Pat. No. 6,069,825, Tang describes a charge pump for conductive lines in programmable semiconductor memory arrays, which allows reduced carrier injection into the circuit substrate. When a conductive line is selected for programming, a passive capacitor can be used to couple voltage pulses from an oscillator to a charge transfer node and on to the conductive line. During time periods between the voltage pulses, charge increments are transferred from a high-voltage source to the conductive line through the charge transfer node. Increasing the efficiency of the charge pump described by Tang could be achieved by increasing the frequency of the oscillator, or by increasing the area of the capacitor used for coupling the voltage pulses to the charge transfer node. Increasing the oscillator frequency can lead to increased power consumption. At the same time, increasing the transfer capacitor area sufficiently to achieve a desired charge pump efficiency can require an unacceptable increase in the die area for the array.
The present invention provides an improved self-decoding apparatus integrated on a chip for selectively charging conductive lines of a programmable non-volatile memory array for programming. In the preferred embodiment, the apparatus comprises comprises: oscillator output capacitive coupling circuitry connecting an oscillator output to a first control node corresponding to a selected conductive line, the capacitive coupling circuitry being responsive to a voltage on the first control node, for capacitively coupling voltage pulses from the oscillator output to the first control node while the conductive line is selected; control selective charge transfer circuitry connecting a high voltage source to a second control node through the first control node, the second control node corresponding to the conductive line and having a lower capacitance than the conductive line, for selectively transferring charge increments from the high-voltage source to the second control node while the conductive line is selected, in response to the voltage pulses received at the first control node and in response to a voltage on the second control node; conductive line charging control circuitry connecting the high voltage source to the conductive line and responsive to the second control node, for selectively transferring charge from the high voltage source to the conductive line while the conductive line is selected, in response to the voltage on the second control node; and conductive line isolation circuitry connecting the conductive line to the second control node, for selectively charging the second control node from the conductive line while the conductive line is selected, and for preventing a charging of the conductive line from the second control node.